| Presentation | 2005/1/21 Self-Erase Discharge and its Influence on Wall Charge Accumulation in PDPs Masazumi TONE, Taishi SAKASHITA, Tsutomu KOIKE, Ayuhiko SAITO, Kiyoshi IGARASHI, Tomokazu SHIGA, Shigeo MIKOSHIBA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In plasma display panels, wall charges play an important role for reset and address operations. An effective use of the wall charges accumulated by the reset discharge lowers the address voltage. In this report, conditions for the wall charge accumulation is investigated. Quantity of the accumulated wall charges depends on the accumulation pulse voltage and width. There is an upper limit for the charge accumulation. The limit is determined by a dissipation of the wall charges due to a weak discharge which occurs immediately after the trailing edge of the accumulation pulse. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | plasma display / breakdown voltage / wall charge / self erase discharge |
| Paper # | EID2004-65 |
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| Conference Information | |
| Committee | EID |
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| Conference Date | 2005/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Electronic Information Displays (EID) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Self-Erase Discharge and its Influence on Wall Charge Accumulation in PDPs |
| Sub Title (in English) | |
| Keyword(1) | plasma display |
| Keyword(2) | breakdown voltage |
| Keyword(3) | wall charge |
| Keyword(4) | self erase discharge |
| 1st Author's Name | Masazumi TONE |
| 1st Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications() |
| 2nd Author's Name | Taishi SAKASHITA |
| 2nd Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| 3rd Author's Name | Tsutomu KOIKE |
| 3rd Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| 4th Author's Name | Ayuhiko SAITO |
| 4th Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| 5th Author's Name | Kiyoshi IGARASHI |
| 5th Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| 6th Author's Name | Tomokazu SHIGA |
| 6th Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| 7th Author's Name | Shigeo MIKOSHIBA |
| 7th Author's Affiliation | Dept. of Electronic Engineering, The University of Electro-Communications |
| Date | 2005/1/21 |
| Paper # | EID2004-65 |
| Volume (vol) | vol.104 |
| Number (no) | 621 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |