Presentation 2005/3/4
A Case Study on Processor Design with Behavioral Synthesis
Koji NIURAO, Shinya HONDA, Hiroyuki TOMIYAMA, Hiroaki TAKADA,
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Abstract(in English) This paper studies behavioral synthesis of application specific processors. At first in this study, we have designed a MIPS-based general purpose processor with a commercial behavioral synthesis tool. We compared the performance, area and design productivity of the processor against those of manually designed ones at RTL. Secondly, we have designed an application specific processor for the ADPCM (Adaptive Differential Pulse Code Modulation) application with behavioral synthesis. In summary, using behavioral synthesis in the design of application specific processors significantly improves the design productivity. However, it is difficult to automatically design high-performance pipelined processors.
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Keyword(in English) Behavioral synthesis / case study / ASIP
Paper # VLD2004-140,ICD2004-236
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Committee VLD
Conference Date 2005/3/4(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Case Study on Processor Design with Behavioral Synthesis
Sub Title (in English)
Keyword(1) Behavioral synthesis
Keyword(2) case study
Keyword(3) ASIP
1st Author's Name Koji NIURAO
1st Author's Affiliation Graduate School of Information Science, Nagoya University()
2nd Author's Name Shinya HONDA
2nd Author's Affiliation Graduate School of Information Science, Nagoya University
3rd Author's Name Hiroyuki TOMIYAMA
3rd Author's Affiliation Graduate School of Information Science, Nagoya University
4th Author's Name Hiroaki TAKADA
4th Author's Affiliation Graduate School of Information Science, Nagoya University
Date 2005/3/4
Paper # VLD2004-140,ICD2004-236
Volume (vol) vol.104
Number (no) 709
Page pp.pp.-
#Pages 6
Date of Issue