| Presentation | 2005/3/3 High-Speed Low-Power 90-nm CMOS 16 : 1 Multiplexer Ryota Isozaki, Tadayoshi Enomoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 90-nm CMOS 16 : 1 multiplexer (MUX) was developed, designed and fabricated. The maximum data rate was improved to not only about 1.5 times due to a newly developed 4 : 1 multiplexer, but also about 1.8 times due to a newly developed delay flip-flop consisting of static-type logic gates. Power dissipation was reduced to about 1/5 due to a newly developed 4 : 1 multiplexer, about 7/10 due to a newly developed delay flip-flop consisting of static-type logic gates, and about 9/10 due to an optimization of clock driver. At supply voltage of 1.0V the maximum data rate was 17.55 Gbps which was about 2.7 times faster than that of the conventional 16 : 1 multiplexer. At data rate of 10 Gbps and supply voltage of 0.8V the power dissipation of the 16 : 1 multiplexer was reduced to 681μW which was only about 20% that of the conventional 16 : 1 multiplexer. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | multiplexer / MUX / power dissipation / CMOS / delay flip flop / clock driver |
| Paper # | VLD2004-130,ICD2004-226 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2005/3/3(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High-Speed Low-Power 90-nm CMOS 16 : 1 Multiplexer |
| Sub Title (in English) | |
| Keyword(1) | multiplexer |
| Keyword(2) | MUX |
| Keyword(3) | power dissipation |
| Keyword(4) | CMOS |
| Keyword(5) | delay flip flop |
| Keyword(6) | clock driver |
| 1st Author's Name | Ryota Isozaki |
| 1st Author's Affiliation | Graduate School of Science and Engineering, Chuo University() |
| 2nd Author's Name | Tadayoshi Enomoto |
| 2nd Author's Affiliation | Graduate School of Science and Engineering, Chuo University |
| Date | 2005/3/3 |
| Paper # | VLD2004-130,ICD2004-226 |
| Volume (vol) | vol.104 |
| Number (no) | 708 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |