Presentation	2005-01-26 Residue-to-Weighted Converter Using Signed-Digit Number Arithmetic Yumi OGAWA, Shuangching CHEN, Shugang WEI,
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Abstract(in English)	By introducing a signed-digit (SD) number arithmetic into a residue number system (RNS), arithmetic operations can be performed efficiently. In the cases of modulu m=2^p-1, 2^p+1 and 2^p, the modulo m addition can be implemented with an end-around-carry SD adder. In this study, we use the SD number arithmetic circuits to construct a residue-to-weighted converter. Compared with the binary number system by simulation, the proposed residue-to-weighted converter with the SD number representation has hign performance for large moduli.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	residue number system (RNS) / weighted number system / mixed-radix system / signed-digit (SD) number
Paper #	VLD2004-123,CPSY2004-89
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Conference Information
Committee	VLD
Conference Date	2005/1/19(1days)
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Paper Information
Registration To	VLSI Design Technologies (VLD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Residue-to-Weighted Converter Using Signed-Digit Number Arithmetic
Sub Title (in English)
Keyword(1)	residue number system (RNS)
Keyword(2)	weighted number system
Keyword(3)	mixed-radix system
Keyword(4)	signed-digit (SD) number
1st Author's Name	Yumi OGAWA
1st Author's Affiliation	()
2nd Author's Name	Shuangching CHEN
2nd Author's Affiliation	/ Department of Computer Science, Gunma University
3rd Author's Name	Shugang WEI
3rd Author's Affiliation
Date	2005-01-26
Paper #	VLD2004-123,CPSY2004-89
Volume (vol)	vol.104
Number (no)	590
Page	pp.pp.-
#Pages	6
Date of Issue