Presentation 2004/11/25
An Encoding Method for Rail Outputs in LUT cascades
Shinya NAGAYASU, Tsutomu SASAO, Munehiro MATSUURA,
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Abstract(in English) This paper shows a method to reduce the number of cell outputs for an LUT cascade with intermediate outputs by considering encoding. Reduction of the number of rail outputs reduces the number of outputs of LUTs and, the number of levels. Reduction of the number of outputs of LUTs reduces the amount of memory, while the reduction of the number of levels reduces the evaluation time. We use a BDD for characteristic function (BDD_for_CF) in the design. Experimental results show that our approach reduces the number of outputs of LUTs by 10%, and sometimes reduces the number of levels as well.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Logic synthesis / BDD_for_CF / Functional decomposition / LUT cascade / Encoding problem / Non-Strict encoding
Paper # VLD2004-86,ICD2004-172,DC2004-72
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Committee VLD
Conference Date 2004/11/25(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Encoding Method for Rail Outputs in LUT cascades
Sub Title (in English)
Keyword(1) Logic synthesis
Keyword(2) BDD_for_CF
Keyword(3) Functional decomposition
Keyword(4) LUT cascade
Keyword(5) Encoding problem
Keyword(6) Non-Strict encoding
1st Author's Name Shinya NAGAYASU
1st Author's Affiliation Program of Creation Informatics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Comoputer Science and Eldctronics, Kyushu Institute of Technology
3rd Author's Name Munehiro MATSUURA
3rd Author's Affiliation Department of Comoputer Science and Eldctronics, Kyushu Institute of Technology
Date 2004/11/25
Paper # VLD2004-86,ICD2004-172,DC2004-72
Volume (vol) vol.104
Number (no) 478
Page pp.pp.-
#Pages 6
Date of Issue