Presentation | 2005-05-26 Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process Kenichi KAWASAKI, Tetsuyoshi SHIOTA, Yukihito KAWABE, Wataru SHIBAMOTO, Atsushi SATO, Tetsutaro HASHIMOTO, Motoaki MATSUMURA, Hiroshi OKANO, Fumihiko HAYAKAWA, Shinichiro TOGO, Yasuki NAKAMURA, Hideo MIYAKE, Atsuhiro SUGA, Hiromasa TAKAHASHI, Atsuki INOUE, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus direct memory access. Since it is confirmed its power consumption has been 3.0W on actual measurement, we consider it has the highest performance per watt in the micro-processors in the world. In achievement, we have solved the problems of large power supply noise and delay penalty caused by making of large-scale circuit and increasing number of signal I/Os. Therefore, we have operated completely on the system-board at the first-silicon chip. We chiefly reports on our solution for closure of power supply noise problems. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Processor / Multi-Core / 90nm / HDTV / Power Supply Noise / Jitter |
Paper # | ICD2005-21 |
Date of Issue |
Conference Information | |
Committee | ICD |
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Conference Date | 2005/5/19(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process |
Sub Title (in English) | |
Keyword(1) | Processor |
Keyword(2) | Multi-Core |
Keyword(3) | 90nm |
Keyword(4) | HDTV |
Keyword(5) | Power Supply Noise |
Keyword(6) | Jitter |
1st Author's Name | Kenichi KAWASAKI |
1st Author's Affiliation | Fujitsu Laboratories LTD.() |
2nd Author's Name | Tetsuyoshi SHIOTA |
2nd Author's Affiliation | Fujitsu Laboratories LTD. |
3rd Author's Name | Yukihito KAWABE |
3rd Author's Affiliation | Fujitsu Laboratories LTD. |
4th Author's Name | Wataru SHIBAMOTO |
4th Author's Affiliation | Fujitsu Laboratories LTD. |
5th Author's Name | Atsushi SATO |
5th Author's Affiliation | Fujitsu Laboratories LTD. |
6th Author's Name | Tetsutaro HASHIMOTO |
6th Author's Affiliation | Fujitsu Laboratories LTD. |
7th Author's Name | Motoaki MATSUMURA |
7th Author's Affiliation | Fujitsu Laboratories LTD. |
8th Author's Name | Hiroshi OKANO |
8th Author's Affiliation | Fujitsu Laboratories LTD. |
9th Author's Name | Fumihiko HAYAKAWA |
9th Author's Affiliation | Fujitsu Laboratories LTD. |
10th Author's Name | Shinichiro TOGO |
10th Author's Affiliation | Fujitsu Laboratories LTD. |
11th Author's Name | Yasuki NAKAMURA |
11th Author's Affiliation | Fujitsu Laboratories LTD. |
12th Author's Name | Hideo MIYAKE |
12th Author's Affiliation | Fujitsu LSI Technology LTD. |
13th Author's Name | Atsuhiro SUGA |
13th Author's Affiliation | Fujitsu Laboratories LTD. |
14th Author's Name | Hiromasa TAKAHASHI |
14th Author's Affiliation | Fujitsu Laboratories LTD. |
15th Author's Name | Atsuki INOUE |
15th Author's Affiliation | Fujitsu Laboratories LTD. |
Date | 2005-05-26 |
Paper # | ICD2005-21 |
Volume (vol) | vol.105 |
Number (no) | 95 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |