| Presentation | 2005/3/4 Supply-Voltage Assignment Using Regularity for Low Power Design Shigeo YAMADERA, Masanori HARIYAMA, Michitaka KAMEYAMA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a design method to minimize energy of both functional units (FUs) and an interconnection network between FUs. To reduce complexity of the interconnection network, data transfers between FUs are classified according to FU types of operations in a data flow graph. The basic idea behind reducing the complexity of the interconnection network is that the interconnection resource can be shared among data transfers with the same FU type of a source node and the same FU type of a destination node. Moreover, an efficient method based on a genetic algorithm is presented for large-size problems. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | High-level synthesis / Energy consumption minimization / Interconection simplification / Multipile supply voltages / Genetic algorithm |
| Paper # | VLD2004-137,ICD2004-233 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2005/3/4(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Supply-Voltage Assignment Using Regularity for Low Power Design |
| Sub Title (in English) | |
| Keyword(1) | High-level synthesis |
| Keyword(2) | Energy consumption minimization |
| Keyword(3) | Interconection simplification |
| Keyword(4) | Multipile supply voltages |
| Keyword(5) | Genetic algorithm |
| 1st Author's Name | Shigeo YAMADERA |
| 1st Author's Affiliation | Graduate School of Information Sciences, Tohoku University() |
| 2nd Author's Name | Masanori HARIYAMA |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| 3rd Author's Name | Michitaka KAMEYAMA |
| 3rd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| Date | 2005/3/4 |
| Paper # | VLD2004-137,ICD2004-233 |
| Volume (vol) | vol.104 |
| Number (no) | 711 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |