Presentation 2005-01-28
Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs
Yukihisa Funatsu, Hiroshi Sumitomo, Kazuki Shigeta, Toshio Ishiyama,
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Abstract(in English) For recent highly integrated and shrunk LSIs, CAD-based fault diagnosis technology which supports physical failure analysis has become more impotant, . Our group has proposed and developed fault diagnosis technique of several types of a single fault (stuck-at, open, and bridging fault). In this paper, we report a fault diagnosis method for multiple faults, The method classifies fault effect propagation paths in a circuit and its results.
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Keyword(in English) fault diagnosis / logic circuit / multi fault / path trace / sequential circuit
Paper # CPM2004-174,ICD2004-219
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Conference Date 2005/1/21(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs
Sub Title (in English)
Keyword(1) fault diagnosis
Keyword(2) logic circuit
Keyword(3) multi fault
Keyword(4) path trace
Keyword(5) sequential circuit
1st Author's Name Yukihisa Funatsu
1st Author's Affiliation Test Analysis Technology Development Division, NEC Electronics Corporation()
2nd Author's Name Hiroshi Sumitomo
2nd Author's Affiliation Test Analysis Technology Development Division, NEC Electronics Corporation
3rd Author's Name Kazuki Shigeta
3rd Author's Affiliation Test Analysis Technology Development Division, NEC Electronics Corporation
4th Author's Name Toshio Ishiyama
4th Author's Affiliation Test Analysis Technology Development Division, NEC Electronics Corporation
Date 2005-01-28
Paper # CPM2004-174,ICD2004-219
Volume (vol) vol.104
Number (no) 629
Page pp.pp.-
#Pages 6
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