| Presentation | 2005-01-28 Improvement of RTL Fault Diagnosis Technology for Practical Use Masafumi NIKAIDO, Yukihisa FUNATSU, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | RTL (Register Transfer Level) fault diagnosis technique based on backtracking the node in Assignment Decision Diagrams (ADDs) has been proposed. And two types of integrated diagnosis system have been proposed. One of them is the system that narrows down the fault candidate hierarchically to gate-level from RTL. The other system is that RTL diagnosis handles RTL libraries in a gate-level diagnosis. In this paper, RTL libraries diagnosis capability was discussed using several benchmark circuits and library circuits. The result imply that the calculation time of the RTL diagnosis would become effectively shorter than the one of the gate-level diagnosis, if the number of nodes in ADD become less than the one in a gate-level netlist. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Fault Diagnosis / RTL / Logic Circuit / Decision Diagram / Path Trace |
| Paper # | CPM2004-166,ICD2004-211 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2005/1/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improvement of RTL Fault Diagnosis Technology for Practical Use |
| Sub Title (in English) | |
| Keyword(1) | Fault Diagnosis |
| Keyword(2) | RTL |
| Keyword(3) | Logic Circuit |
| Keyword(4) | Decision Diagram |
| Keyword(5) | Path Trace |
| 1st Author's Name | Masafumi NIKAIDO |
| 1st Author's Affiliation | Test Analysis Technology Development Division, NEC Electronics Corporation() |
| 2nd Author's Name | Yukihisa FUNATSU |
| 2nd Author's Affiliation | Test Analysis Technology Development Division, NEC Electronics Corporation |
| Date | 2005-01-28 |
| Paper # | CPM2004-166,ICD2004-211 |
| Volume (vol) | vol.104 |
| Number (no) | 629 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |