Presentation 2004-10-22
SoC debug architecture and applications
Tomoyuki KODAMA, Makoto SAEN, Junichi NISHIMOTO, Fumio ARAKAWA,
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Abstract(in English) Debugging tools analyzing CPU core mainly are inadequacy for latest SoC, which have many IPs. Especially debugging tools with real time operations or system performance analysis techniques for optimization are indicated. Therefore we develop techniques to coexistence between debug and real time operations and to modularize circuits for performance analysis.
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Keyword(in English) Debug / Real time operation / Performance optimization
Paper # SIP2004-95,ICD2004-127,IE2004-71
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Conference Date 2004/10/15(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) SoC debug architecture and applications
Sub Title (in English)
Keyword(1) Debug
Keyword(2) Real time operation
Keyword(3) Performance optimization
1st Author's Name Tomoyuki KODAMA
1st Author's Affiliation Hitachi, Ltd.()
2nd Author's Name Makoto SAEN
2nd Author's Affiliation Hitachi, Ltd.
3rd Author's Name Junichi NISHIMOTO
3rd Author's Affiliation Renesas Technology Corp.
4th Author's Name Fumio ARAKAWA
4th Author's Affiliation Hitachi, Ltd.
Date 2004-10-22
Paper # SIP2004-95,ICD2004-127,IE2004-71
Volume (vol) vol.104
Number (no) 366
Page pp.pp.-
#Pages 5
Date of Issue