| Presentation | 2005/1/24 On-Chip Transmission Line for Long Global Interconnects Hiroyuki ITO, Junpei INOUE, Shinichiro GOMI, Hideyuki SUGITA, Kenichi OKADA, Kazuya MASU, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper investigates the feasibility of differential transmission line interconnects at the future process technology. Delay time of differential transmission line interconnect is a tenth part of RC interconnect delay, and differential transmission line interconnect can save the power of 80% at 5-mm-long line in 45nm technology. It is expected that the circuit with transmission line interconnects can save 10% power at 45nm process. Additional global layers for transmission line interconnect give the power saving of 30%. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | on-chip transmission line interconnect / global interconnect / interconnect delay / power consumption |
| Paper # | SDM2004-235 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2005/1/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | On-Chip Transmission Line for Long Global Interconnects |
| Sub Title (in English) | |
| Keyword(1) | on-chip transmission line interconnect |
| Keyword(2) | global interconnect |
| Keyword(3) | interconnect delay |
| Keyword(4) | power consumption |
| 1st Author's Name | Hiroyuki ITO |
| 1st Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory() |
| 2nd Author's Name | Junpei INOUE |
| 2nd Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory |
| 3rd Author's Name | Shinichiro GOMI |
| 3rd Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory |
| 4th Author's Name | Hideyuki SUGITA |
| 4th Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory |
| 5th Author's Name | Kenichi OKADA |
| 5th Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory |
| 6th Author's Name | Kazuya MASU |
| 6th Author's Affiliation | Tokyo Institute of Technology, Precision and Intelligence Laboratory |
| Date | 2005/1/24 |
| Paper # | SDM2004-235 |
| Volume (vol) | vol.104 |
| Number (no) | 645 |
| Page | pp.pp.- |
| #Pages | 6 |
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