| Presentation | 2005/1/14 Room-Temperature Demonstration of Current Switching and Analog Pattern Matching Using Integrated Silicon Single-Electron Transistor Circuits Masumi SAITOH, Hidehiro HARATA, Toshiro HIRAMOTO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper reports the first room-temperature (RT) operation of integrated single-electron transistor (SET) circuits. We fabricate silicon single-hole transistors (SHTs) with high controllability and observe ultra-large Coulomb blockade (CB) oscillation with the peak-to-valley current ratio of over 10^3 at RT. Current switching operation using two SHTs integrated under a single gate is demonstrated at RT. We propose a novel application of SHTs, an ultra-compact analog pattern matching circuit. Its basic operation is demonstrated at RT using three SHTs fabricated on one chip, whose CB peak positions and currents are properly controlled by hole injection into silicon nanocrystals embedded in the gate oxide. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | single-electron transistor / single-hole transistor / ultra-narrow wire channel / Coulomb blockade oscillation / room temperature operation / current switch / pattern matching / silicon nanocrystals / integrated circuit / analog circuit |
| Paper # | SDM2004-213 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2005/1/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Room-Temperature Demonstration of Current Switching and Analog Pattern Matching Using Integrated Silicon Single-Electron Transistor Circuits |
| Sub Title (in English) | |
| Keyword(1) | single-electron transistor |
| Keyword(2) | single-hole transistor |
| Keyword(3) | ultra-narrow wire channel |
| Keyword(4) | Coulomb blockade oscillation |
| Keyword(5) | room temperature operation |
| Keyword(6) | current switch |
| Keyword(7) | pattern matching |
| Keyword(8) | silicon nanocrystals |
| Keyword(9) | integrated circuit |
| Keyword(10) | analog circuit |
| 1st Author's Name | Masumi SAITOH |
| 1st Author's Affiliation | Institute of Industrial Science, University of Tokyo() |
| 2nd Author's Name | Hidehiro HARATA |
| 2nd Author's Affiliation | Institute of Industrial Science, University of Tokyo:Graduate School of Science and Engineering, Chuo University |
| 3rd Author's Name | Toshiro HIRAMOTO |
| 3rd Author's Affiliation | Institute of Industrial Science, University of Tokyo |
| Date | 2005/1/14 |
| Paper # | SDM2004-213 |
| Volume (vol) | vol.104 |
| Number (no) | 577 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |