Presentation 2005/3/11
Design and Implementation of Branch Predictor of Responsive Multithreaded Processor
Hiraku NAKAMURA, Tsutomu ITOU, Seiichi ARAI, Nobuyuki YAMASAKI,
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Abstract(in English) Responsive Multithreaded Processor (RMT Processor) that can exuecute eight threads simultaneously with priority is researched aiming at real-time processing in our lablatory. Because branch predictors are independently implemented for each thread on a present RMT Processor, the amount of hardware of the branch predictor is increases. Then, we design and inplement the shared branch predictor between threads that have the mechanism that suppresses the interference between threads by using priority information. As a result, it succeeded in about 70% of the amount of hardware reduction with high accuracy of branch prediction of the highest priority thread.
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Keyword(in English) Real-time System / Responsive Multithreaded Processor / Branch Prediction
Paper # CPSY2004-111
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Committee CPSY
Conference Date 2005/3/11(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design and Implementation of Branch Predictor of Responsive Multithreaded Processor
Sub Title (in English)
Keyword(1) Real-time System
Keyword(2) Responsive Multithreaded Processor
Keyword(3) Branch Prediction
1st Author's Name Hiraku NAKAMURA
1st Author's Affiliation Department of Information & Computer Science, Faculty of Science & Technology, Keio University()
2nd Author's Name Tsutomu ITOU
2nd Author's Affiliation Department of Computer Science, Graduate School of Keio University
3rd Author's Name Seiichi ARAI
3rd Author's Affiliation Department of Computer Science, Graduate School of Keio University
4th Author's Name Nobuyuki YAMASAKI
4th Author's Affiliation Department of Computer Science, Graduate School of Keio University
Date 2005/3/11
Paper # CPSY2004-111
Volume (vol) vol.104
Number (no) 738
Page pp.pp.-
#Pages 6
Date of Issue