| Presentation | 2005/3/11 Proposal and Evaluation of Memory Protection Mechanism For Hard Real-Time Systems MITSURU NISHIBE, SHINYA HONDA, HIROYUKI TOMIYAMA, HIROAKI TAKADA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recentry, there is a problem in hard real-time embedded system that the increase of the development cost and the decrease of the quality and reliability because of increasing software complexity, the need for memory protection will only increase over time. Memory protection is necessary both hardware and software (OS) support. First, it proposed the protection method to improve a past memory protection method, made the circuit of a past method and the proposed method, and evaluated each area of the circuit and the delay. Proposal MPU was mounted on 32 bit processor, and ported the kernel based on μITRON/PX. From the results the proposed protection unit is better than other method in the protection efficiency, real-time performance and the hardware cost. It made clear that memory protection is valid in hard real-time system. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | hard real-time / memory protection / μITRON/PX |
| Paper # | CPSY2004-109 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2005/3/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Proposal and Evaluation of Memory Protection Mechanism For Hard Real-Time Systems |
| Sub Title (in English) | |
| Keyword(1) | hard real-time |
| Keyword(2) | memory protection |
| Keyword(3) | μITRON/PX |
| 1st Author's Name | MITSURU NISHIBE |
| 1st Author's Affiliation | Graduate School of Information Science, Nagoya University() |
| 2nd Author's Name | SHINYA HONDA |
| 2nd Author's Affiliation | Department of Information and Computer Sciences, Toyohashi University of Technology |
| 3rd Author's Name | HIROYUKI TOMIYAMA |
| 3rd Author's Affiliation | Graduate School of Information Science, Nagoya University |
| 4th Author's Name | HIROAKI TAKADA |
| 4th Author's Affiliation | Graduate School of Information Science, Nagoya University |
| Date | 2005/3/11 |
| Paper # | CPSY2004-109 |
| Volume (vol) | vol.104 |
| Number (no) | 738 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |