Presentation 2005-01-26
ASIP Architecture for Real-Time Graphical Effect Processing
Tatsuhiro YOSHIMURA, Keishi SAKANUSHI, Yoshinori TAKEUCHI, Masaharu IMAI,
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Abstract(in English) Graphical effect processing realizes a variety of visual representation. In this paper, we propose an ASIP architecture for real-time graphical effect processing. The proposed architecutre consists of ASIP (Application Specific Instruction set Processor) and memory access unit specified for graphical effect processing. We implemented an ASIP based on the proposed architecture, and evaluated execution time of graphical effects processing on instruction set simulator (ISS). Results of logic synthesis and evaluation on ISS show that the proposed architecture can process real-time graphical effects with additional small H/W cost.
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Keyword(in English) digital image processing / graphical effect / ASIP / memory access circuit
Paper # VLD2004-118,CPSY2004-84
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Committee CPSY
Conference Date 2005/1/19(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) ASIP Architecture for Real-Time Graphical Effect Processing
Sub Title (in English)
Keyword(1) digital image processing
Keyword(2) graphical effect
Keyword(3) ASIP
Keyword(4) memory access circuit
1st Author's Name Tatsuhiro YOSHIMURA
1st Author's Affiliation Graduate School of Information Science and Technology, Osaka University()
2nd Author's Name Keishi SAKANUSHI
2nd Author's Affiliation Graduate School of Information Science and Technology, Osaka University
3rd Author's Name Yoshinori TAKEUCHI
3rd Author's Affiliation Graduate School of Information Science and Technology, Osaka University
4th Author's Name Masaharu IMAI
4th Author's Affiliation Graduate School of Information Science and Technology, Osaka University
Date 2005-01-26
Paper # VLD2004-118,CPSY2004-84
Volume (vol) vol.104
Number (no) 592
Page pp.pp.-
#Pages 6
Date of Issue