| Presentation | 2004/11/25 Development of 4x4 Inverse Matrix Arithmetic Circuit Using Verilog-HDL Yoshio WADA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This report is described development of 4x4 inverse matrix arithmetic circuit using the floating-point operation. We are developing wireless communication Systems. The transmission rate is maximum 1 Gbps. To achieve the systems, Multiple Input Multiple Output (MIMO) transmission technology for Orthogonal Frequency Division Multiplexing (OFDM) systems is needed. There is Zero-Forcing (ZF) detection in the systems. It is necessary that the inverse matrix arithmetic circuit is operated at a high speed. It is possible that the developed 4x4 inverse matrix arithmetic circuit using Verilog-HDL consists of a FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Wireless Communication / MIMO / OFDM / ZF / Inverse Matrix / FPGA / Verilog-HDL / Floating point operation |
| Paper # | CPSY2004-45 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2004/11/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development of 4x4 Inverse Matrix Arithmetic Circuit Using Verilog-HDL |
| Sub Title (in English) | |
| Keyword(1) | Wireless Communication |
| Keyword(2) | MIMO |
| Keyword(3) | OFDM |
| Keyword(4) | ZF |
| Keyword(5) | Inverse Matrix |
| Keyword(6) | FPGA |
| Keyword(7) | Verilog-HDL |
| Keyword(8) | Floating point operation |
| 1st Author's Name | Yoshio WADA |
| 1st Author's Affiliation | Samsung Yokohama Research Institute Wireless Comm. Lab. Wireless Comm. System Team() |
| Date | 2004/11/25 |
| Paper # | CPSY2004-45 |
| Volume (vol) | vol.104 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |