Presentation 2004/11/25
Research of a Vision Chip direct coupled type DCT
Kensuke KAWAJIRI, Taichi NAGAMOTO, Yuichiro SHIBATA, Kiyoshi OGURI,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Generally, although the algorithm of image processing has many things suitable for parallel and distributed processing, if all are treated in parallel in order to use complicated operation abundantly, there is a problem on which the scale of an operation circuit increases, and this point has determined the limit of parallel processing. Here, it is expected that the scale of an operation circuit is reducible by treating a pixel to bit sirial. At this laboratory, research of a vision chip with the multi-output port which can process and output all pixels in parallel as approach to this view, and research of the display displayed without using raster operation are done now. Moreover, usually, DCT processing takes in input data in a memory, and starts processing after that. It thinks that it can process by carrying out without making a DCT processing portion and a sensor link the process of this data t aking in directly, and using a memory, at high speed. In this paper, it had a multi-input-and-output port on condition of such an input/output device, a sensor and DCT which can be linked directly were created, and performance comparison with XAPP610-DCT of XILINX was performed. As a result, although area increased 7.82 times, processing speed improved 32 times in the per block. This paper describes the composition and the performance of this vision chip direct coupled type DCT.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Vision Chip / DCT / bit-serial arithmetic
Paper # CPSY2004-39
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Conference Information
Committee CPSY
Conference Date 2004/11/25(1days)
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Paper Information
Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Research of a Vision Chip direct coupled type DCT
Sub Title (in English)
Keyword(1) Vision Chip
Keyword(2) DCT
Keyword(3) bit-serial arithmetic
1st Author's Name Kensuke KAWAJIRI
1st Author's Affiliation Department of Electrical Engineering and Computer Science, Graduate School of Science and Technology, Nagasaki University()
2nd Author's Name Taichi NAGAMOTO
2nd Author's Affiliation Department of Electrical Engineering and Computer Science, Graduate School of Science and Technology, Nagasaki University
3rd Author's Name Yuichiro SHIBATA
3rd Author's Affiliation Department of Electrical Engineering and Computer Science, Graduate School of Science and Technology, Nagasaki University
4th Author's Name Kiyoshi OGURI
4th Author's Affiliation Department of Electrical Engineering and Computer Science, Graduate School of Science and Technology, Nagasaki University
Date 2004/11/25
Paper # CPSY2004-39
Volume (vol) vol.104
Number (no) 476
Page pp.pp.-
#Pages 6
Date of Issue