| Presentation | 2004/11/25 The Design and Implementation of The IPsec Accelerator with The Dynamically Reconfigurable Processor Yohei HASEGAWA, Shohei ABE, Kenichiro ANJO, Toru AWASHIMA, Hideharu AMANO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Recent dynamically reconfigurable processors with rapid reconfiguration can hold the multiple configurations inside and load the alternative configuration from the external memory. These functions enable the practical virtual hardware such that implements the huge or mlutiple applications. In this paper, the scalable IPsec accelerator with multiple cryptographic applications has implemented with the NEC's Dynamically Reconfigurable Processor(DRP). Also, we discuss the problems and solutions of its design. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | reconfigurable processor / DRP / dynamic reconfiguration / virtual hardware / multi-applications / IPsec / cryptography / network security |
| Paper # | CPSY2004-37 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2004/11/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | The Design and Implementation of The IPsec Accelerator with The Dynamically Reconfigurable Processor |
| Sub Title (in English) | |
| Keyword(1) | reconfigurable processor |
| Keyword(2) | DRP |
| Keyword(3) | dynamic reconfiguration |
| Keyword(4) | virtual hardware |
| Keyword(5) | multi-applications |
| Keyword(6) | IPsec |
| Keyword(7) | cryptography |
| Keyword(8) | network security |
| 1st Author's Name | Yohei HASEGAWA |
| 1st Author's Affiliation | Department of Information and Computer Science, Keio University() |
| 2nd Author's Name | Shohei ABE |
| 2nd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 3rd Author's Name | Kenichiro ANJO |
| 3rd Author's Affiliation | NEC Electronics |
| 4th Author's Name | Toru AWASHIMA |
| 4th Author's Affiliation | NEC System Devices Research Labs. |
| 5th Author's Name | Hideharu AMANO |
| 5th Author's Affiliation | Department of Information and Computer Science, Keio University |
| Date | 2004/11/25 |
| Paper # | CPSY2004-37 |
| Volume (vol) | vol.104 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |