| Presentation | 2005-06-28 Design and Evaluation of a Bit-Parallel Magnitude-Comparison CAM Based on TMR Logic Kohei SHOJI, Takahiro HANYU, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The paper presents a new circuit style called "TMR logic" combining TMR (tunneling magnetoresistive) devices with connected MOS pass-transistor network, which results merging storage function into logic circuit plane with a small area. Since the TMR device can be regarded as a variable resistor with non-volatile storage capability, the logic function can be realized by series and parallel connection of the TMR devices and transistors. As a typical example, a content-addressable memory (CAM) where magnitude-compare in a bit-parallel fashion simply implemented based on TMR logic and its performance improvement is also demonstrated. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MRAM / TMR / MR ratio / nonvolatile logic / wired logic / content-addressable memory(CAM) |
| Paper # | CAS2005-24,VLD2005-35,SIP2005-48 |
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| Conference Information | |
| Committee | CAS |
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| Conference Date | 2005/6/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and Evaluation of a Bit-Parallel Magnitude-Comparison CAM Based on TMR Logic |
| Sub Title (in English) | |
| Keyword(1) | MRAM |
| Keyword(2) | TMR |
| Keyword(3) | MR ratio |
| Keyword(4) | nonvolatile logic |
| Keyword(5) | wired logic |
| Keyword(6) | content-addressable memory(CAM) |
| 1st Author's Name | Kohei SHOJI |
| 1st Author's Affiliation | Research Institute of Electrical Communication and Tohoku University() |
| 2nd Author's Name | Takahiro HANYU |
| 2nd Author's Affiliation | Research Institute of Electrical Communication and Tohoku University |
| Date | 2005-06-28 |
| Paper # | CAS2005-24,VLD2005-35,SIP2005-48 |
| Volume (vol) | vol.105 |
| Number (no) | 146 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |