| Presentation | 2005-06-28 Formal Design of Arithmetic Circuits with Arithmetic Description Language: ARITH Yuuki WATANABE, Nofumi HOMMA, Takahumi AOKI, Tatsuo HIGUCHI, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a design of parallel multipliers based on arithmetic description language called ARITH. The multiplication algorithms in ARITH can be verified formally by formula manipulations. In this paper, we also present an application of ARITH to a multiplier module generator. The proposed system generates 352 types of parallel multipliers including those using unconventional number systems such as redundant number systems. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | arithmetic circuit / hardware description language / formal verification |
| Paper # | CAS2005-21,VLD2005-32,SIP2005-45 |
| Date of Issue |
| Conference Information | |
| Committee | CAS |
|---|---|
| Conference Date | 2005/6/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Formal Design of Arithmetic Circuits with Arithmetic Description Language: ARITH |
| Sub Title (in English) | |
| Keyword(1) | arithmetic circuit |
| Keyword(2) | hardware description language |
| Keyword(3) | formal verification |
| 1st Author's Name | Yuuki WATANABE |
| 1st Author's Affiliation | Graduate School of Information Sciences Tohoku University() |
| 2nd Author's Name | Nofumi HOMMA |
| 2nd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| 3rd Author's Name | Takahumi AOKI |
| 3rd Author's Affiliation | Graduate School of Information Sciences Tohoku University |
| 4th Author's Name | Tatsuo HIGUCHI |
| 4th Author's Affiliation | Department of Electronic Engineering, Faculty of Engineering, Tohoku Institute of Technology |
| Date | 2005-06-28 |
| Paper # | CAS2005-21,VLD2005-32,SIP2005-45 |
| Volume (vol) | vol.105 |
| Number (no) | 146 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |