| Presentation | 2004-10-15 Next Generation Backbone Router Architecture supporting lOOGbps and Multi-functional Internet Hiroaki NISHI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A router architecture for supporting the increasing internet traffic, called Tera-Gears, is discussed. Tera-Gears consist of three basic elements; P-Gear for analyzing packets, S-Gear for transmitting packets to destination ports, and L-Gear for defining destination ports. P-Gear is a network processor including Process-Learning Cache (PLC) and Cache Miss Handler (CMH) that use a locality in the internet traffic effectively. S-Gear is a sophisticated switch including a hybrid crossbar arbiter, having a suitable structure to form a pipeline structure, and supporting QoS. L-Gear is a table-lookup hardware, which enables a high-speed lookup by combining requests and prevents increasing the hardware size of routing table memories. Some simulations are also made to confirm its effectiveness in P-Gear. The simulation is a functional simulation using a virtual lOOGbps that is based on a real traffic. This simulation result shows that P-Gear can improve the throughput over 2.5 times. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Tera-Gears / Network processor / Crossbar Arbiter / Routing table lookup |
| Paper # | IN2004-90 |
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| Conference Information | |
| Committee | IN |
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| Conference Date | 2004/10/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Information Networks (IN) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Next Generation Backbone Router Architecture supporting lOOGbps and Multi-functional Internet |
| Sub Title (in English) | |
| Keyword(1) | Tera-Gears |
| Keyword(2) | Network processor |
| Keyword(3) | Crossbar Arbiter |
| Keyword(4) | Routing table lookup |
| 1st Author's Name | Hiroaki NISHI |
| 1st Author's Affiliation | Faculty of Science and Technology, Keio University() |
| Date | 2004-10-15 |
| Paper # | IN2004-90 |
| Volume (vol) | vol.104 |
| Number (no) | 340 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |