Presentation 2005/6/23
Fabrication and characterization of a in-plane gate single electron tunneling transistor(Quantum Devices)
S. H. Son, Y. S. Choi, K. H. Cho, Y. J. Park, J. I. Lee, Y. S. Yu, S. W. Hwang, D. Ahn,
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Abstract(in English) We report the fabrication and characterization of two different in-plane-gate transistors made from a GaAs/AlGaAs two-dimensional electron system. The first transistor is depletion mode and the second one is enhancement mode. These two modes are distinguished by the fabricated channel width. Transport measurements at room temperature (T) of these devices show the characteristics of depletion and enhancement mode of a field effect transistor. The drain current-gate bias (I_-V_) measurements of both transistors at low temperature (T=4.2K) exhibit Coulomb oscillations. Moreover, I_-V_ characteristics of the enhancement mode device can be reproduced by double dot in series model.
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Keyword(in English) In-plane gate transistor / single electron tunneling
Paper # ED2005-106,SDM2005-126
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Committee ED
Conference Date 2005/6/23(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Fabrication and characterization of a in-plane gate single electron tunneling transistor(Quantum Devices)
Sub Title (in English)
Keyword(1) In-plane gate transistor
Keyword(2) single electron tunneling
1st Author's Name S. H. Son
1st Author's Affiliation Dept. of Electronics & Computer Engineering, Korea University:Nano Device Research Center, Korea Institute of Science and Technology:Institute of Quantum Information Processing and Systems, University of Seoul()
2nd Author's Name Y. S. Choi
2nd Author's Affiliation Dept. of Electronics & Computer Engineering, Korea University:Nano Device Research Center, Korea Institute of Science and Technology
3rd Author's Name K. H. Cho
3rd Author's Affiliation Dept. of Electronics & Computer Engineering, Korea University:Institute of Quantum Information Processing and Systems, University of Seoul
4th Author's Name Y. J. Park
4th Author's Affiliation Nano Device Research Center, Korea Institute of Science and Technology
5th Author's Name J. I. Lee
5th Author's Affiliation Nano Device Research Center, Korea Institute of Science and Technology
6th Author's Name Y. S. Yu
6th Author's Affiliation Dept. of Information & Control Eng., Hankyong National University
7th Author's Name S. W. Hwang
7th Author's Affiliation Dept. of Electronics & Computer Engineering, Korea University:Institute of Quantum Information Processing and Systems, University of Seoul
8th Author's Name D. Ahn
8th Author's Affiliation Institute of Quantum Information Processing and Systems, University of Seoul
Date 2005/6/23
Paper # ED2005-106,SDM2005-126
Volume (vol) vol.105
Number (no) 154
Page pp.pp.-
#Pages 4
Date of Issue