Presentation 2005/6/21
Novel Structures for 2-Bit Per Cell of NVM Using Asymmetric Double Gate(Advanced Si Devices)
Kuk Hwan Kim, Hyunjin Lee, Yang Kyu Choi,
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Abstract(in English) A 2-bit operational metal-oxide-nitride-oxide-silicon (MONOS) nonvolatile memory using an asymmetric double-gate (ASDG) MOSFET is studied to double the flash memory density. The 2-bit programming and erasing is performed by Fowler-Nordheim (FN) tunneling in a NAND array architecture using individually controlled gates. A threshold voltage shift of programmed states for the 2-bit operation was investigated with the aid of SILVACO^[○!R] simulator in the both sides of gate by changing gate workfunctions and tunneling oxide thicknesses. In this paper, guidelines of the 2-bit ASDG nonvolatile memory structure and operational conditions are proposed for "program", "read", and "erase".
Keyword(in Japanese) (See Japanese page)
Keyword(in English) MONOS / Fowler-Nordheim tunneling / Asymmetric double gate / Nonvolatile memory / Flash memory
Paper # ED2005-82,SDM2005-102
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Committee ED
Conference Date 2005/6/21(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Novel Structures for 2-Bit Per Cell of NVM Using Asymmetric Double Gate(Advanced Si Devices)
Sub Title (in English)
Keyword(1) MONOS
Keyword(2) Fowler-Nordheim tunneling
Keyword(3) Asymmetric double gate
Keyword(4) Nonvolatile memory
Keyword(5) Flash memory
1st Author's Name Kuk Hwan Kim
1st Author's Affiliation Dept. of EECS, Korea Advanced Institute of Science and Technology()
2nd Author's Name Hyunjin Lee
2nd Author's Affiliation Dept. of EECS, Korea Advanced Institute of Science and Technology
3rd Author's Name Yang Kyu Choi
3rd Author's Affiliation Dept. of EECS, Korea Advanced Institute of Science and Technology
Date 2005/6/21
Paper # ED2005-82,SDM2005-102
Volume (vol) vol.105
Number (no) 152
Page pp.pp.-
#Pages 4
Date of Issue