Presentation 2004/12/9
HfC coated field emitter array integrated with poly-Si TFT
Masayoshi Nagao, Yutaka Sacho, Hisao Tanoue, Seigo Kanemaru, Junji Itoh,
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Abstract(in English) The HfC-coated amorphous Si field emitter arrays (FEA) controlled by build-in poly-Si thin-film transistor (TFT) was proposed and fabricated. The FEA was fabricated at relatively low temperature using Ar ion sputter sharpening process so that low temperature poly-Si TFT process can be applied. The TFT structure is optimized for controlling field emission current. The lightly-doped drain (LDD) structured TFT with channel length of 50 μm and LDD offset length of 2 μm withstands high source drain voltage more than 40 V. Successful control of FEA by build-in TFT was demonstrated in vacuum chamber. Detailed fabrication process and emission control characteristics will be reported.
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Keyword(in English) Vacuum nano-electronics / field emission display / field emitter array / hafnium carbide / TFT
Paper # ED2004-191
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Committee ED
Conference Date 2004/12/9(1days)
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Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) HfC coated field emitter array integrated with poly-Si TFT
Sub Title (in English)
Keyword(1) Vacuum nano-electronics
Keyword(2) field emission display
Keyword(3) field emitter array
Keyword(4) hafnium carbide
Keyword(5) TFT
1st Author's Name Masayoshi Nagao
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)()
2nd Author's Name Yutaka Sacho
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Hisao Tanoue
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
4th Author's Name Seigo Kanemaru
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
5th Author's Name Junji Itoh
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
Date 2004/12/9
Paper # ED2004-191
Volume (vol) vol.104
Number (no) 519
Page pp.pp.-
#Pages 6
Date of Issue