Presentation 2005-01-27
Analysis Method of LSI open failure point
Yasumaro KOMIYA, Shuji KIKUCHI, Akira SHIMASE, Kazuya MUKOGAWA,
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Abstract(in English) For the purpose of locating an open-failure point in recent LSIs of higher integration, we propose an analysis technique using an alternating electric field to activate an open CMOS gate for triggering observable power supply current change. In this paper, our prototype diagnosis system and the evaluation results with an open failure TEG are introduced. As the result, for an open failure of the top wiring layer (M3), of the 2nd layer (M2), and of the bottom layer (M1), relevant power supply current change was detected and the technical validity of this diagnostic technique was confirmed.
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Keyword(in English) Failure Analysis / LSI / Electric Field / Open Failure
Paper # CPM2004-155,ICD2004-200
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Committee CPM
Conference Date 2005/1/20(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Analysis Method of LSI open failure point
Sub Title (in English)
Keyword(1) Failure Analysis
Keyword(2) LSI
Keyword(3) Electric Field
Keyword(4) Open Failure
1st Author's Name Yasumaro KOMIYA
1st Author's Affiliation Production Engineering Research Laboratory, Hitachi, Ltd()
2nd Author's Name Shuji KIKUCHI
2nd Author's Affiliation Production Engineering Research Laboratory, Hitachi, Ltd
3rd Author's Name Akira SHIMASE
3rd Author's Affiliation Production and Technology Unit, Renesas Technology Corp
4th Author's Name Kazuya MUKOGAWA
4th Author's Affiliation Production and Technology Unit, Renesas Technology Corp
Date 2005-01-27
Paper # CPM2004-155,ICD2004-200
Volume (vol) vol.104
Number (no) 626
Page pp.pp.-
#Pages 6
Date of Issue