| Presentation | 2005/2/2 Design and Fabrication of Digital DROS with Superconducting Flux-Locked Loop Circuit Hiroaki MYOREN, Masatoshi GOTO, Tohru TAINO, Katsuya KIKUCHI, Hiroshi NAKAGAWA, Kazuhiko TOKORO, Masahiro AOYAGI, Susumu TAKADA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have proposed double relaxation oscillation SQUID (DROS) with an on-chip superconducting digital flux locked-loop (FLL) circuit for high sensitive magnetic flux sensor and SQUID amplifier. In this study, we examined superconducting digital FLL circuit composed of an 8-bit up/down counter and an 8-bit R-2R ladder-type D/A converter designed using 4JL-gates which are driven by a two phase power supply. In the up/down counter, we used binary carry lookahead (BCL) circuits for high-speed operation. Logic simulations for the 4JL 8-bit up/down counter with BCL circuits showed correct up- and down-counting operation at 4GHz clock frequency, assuming a 2.5kA/cm^2 Nb/Al-AlO_x/Nb junction technology. We expected that a DROS with the superconducting digital FLL circuit has large slew rate as high as 10^7Φ_0/s. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Digital DROS / 4JL up/down counter / Binary look-ahead circuit / R-2R ladder-type D/A converter |
| Paper # | SCE2004-34 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2005/2/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design and Fabrication of Digital DROS with Superconducting Flux-Locked Loop Circuit |
| Sub Title (in English) | |
| Keyword(1) | Digital DROS |
| Keyword(2) | 4JL up/down counter |
| Keyword(3) | Binary look-ahead circuit |
| Keyword(4) | R-2R ladder-type D/A converter |
| 1st Author's Name | Hiroaki MYOREN |
| 1st Author's Affiliation | Faculty of Engineering, Saitama University() |
| 2nd Author's Name | Masatoshi GOTO |
| 2nd Author's Affiliation | Faculty of Engineering, Saitama University:National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba Central 2 |
| 3rd Author's Name | Tohru TAINO |
| 3rd Author's Affiliation | Faculty of Engineering, Saitama University |
| 4th Author's Name | Katsuya KIKUCHI |
| 4th Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba Central 2 |
| 5th Author's Name | Hiroshi NAKAGAWA |
| 5th Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba Central 2 |
| 6th Author's Name | Kazuhiko TOKORO |
| 6th Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba Central 2 |
| 7th Author's Name | Masahiro AOYAGI |
| 7th Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) Tsukuba Central 2 |
| 8th Author's Name | Susumu TAKADA |
| 8th Author's Affiliation | Faculty of Engineering, Saitama University |
| Date | 2005/2/2 |
| Paper # | SCE2004-34 |
| Volume (vol) | vol.104 |
| Number (no) | 654 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |