| Presentation | 2004/11/24 Proposal of a CAN Bus Model Aimed at Real-Time Constraint Verification and Implementation of the Simulator Seiji YAMAGUCHI, Takahito IJICHI, Tadaaki TANIMOTO, Akio NAKATA, Teruo HIGASHINO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a model for CAN (Control Area Network) protocol, which is a serial bus protocol mainly used for the communications in car system. Our model is an abstraction of the specification of CAN protocol, aimed at improving performance of dynamic verification (simulation) of real-time constraints for bus communications. In our proposed model, we abstract bus arbitration, error handling, and clock cycle handling. By the proposed abstraction, we need not perform a costly wave form simulation. Moreover, unlike static analyses, we can also check correctness of the system behavior in the presence of bus communication errors by simulation. We have implemented a simulator based on our proposed abstracted model. In the simulator, we can specify a concrete I/O behavior for each unit of a bus system, enabling us to check whether real-time constraints are satisfied in the specified behavior setting, as well as influence of bus communication errors. We present some experimental results to show that our abstraction is appropriate and effective for the real-time constraint verification. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CAN / abstraction / real-time system / bus architecture / real-time constraint / simulation |
| Paper # | VLD2004-49,ICD2004-135,DC2004-35 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2004/11/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Proposal of a CAN Bus Model Aimed at Real-Time Constraint Verification and Implementation of the Simulator |
| Sub Title (in English) | |
| Keyword(1) | CAN |
| Keyword(2) | abstraction |
| Keyword(3) | real-time system |
| Keyword(4) | bus architecture |
| Keyword(5) | real-time constraint |
| Keyword(6) | simulation |
| 1st Author's Name | Seiji YAMAGUCHI |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Osaka University() |
| 2nd Author's Name | Takahito IJICHI |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 3rd Author's Name | Tadaaki TANIMOTO |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 4th Author's Name | Akio NAKATA |
| 4th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 5th Author's Name | Teruo HIGASHINO |
| 5th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| Date | 2004/11/24 |
| Paper # | VLD2004-49,ICD2004-135,DC2004-35 |
| Volume (vol) | vol.104 |
| Number (no) | 481 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |