Presentation 2005/2/25
A consideration on the construction of LDPC coded Turbo equalizer
Yukihiro INABA, Yasunori IWANAMI, Eiji OKAMOTO,
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Abstract(in English) Turbo equalizer has an effective equalization ability on frequency selective multipath channels [1]. However, if the maximum delay time of received signal increases, the number of trellis in the Viterbi equalizer grows exponentially. A low complexity equalizer called SC/MMSE without depending on the trellis structure was proposed by Reynolds and Wang for iterative equalization [2]. In this paper we have compared the performance difference of LDPC coded Turbo equalizer which have different inner ISI equalizers, i.e., SOVA, GVA, M algorithm, the proposed algorithm, and the one with the SC/MMSE.
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Keyword(in English) LDPC code / Turbo equalization / reduced complexity ISI equalizer
Paper # WBS2004-128,A・P2004-309,RCS2004-396,MoMuC2004-179,MW2004-306
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Committee MoMuC
Conference Date 2005/2/25(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
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Title (in English) A consideration on the construction of LDPC coded Turbo equalizer
Sub Title (in English)
Keyword(1) LDPC code
Keyword(2) Turbo equalization
Keyword(3) reduced complexity ISI equalizer
1st Author's Name Yukihiro INABA
1st Author's Affiliation Nagoya Institute of Technology()
2nd Author's Name Yasunori IWANAMI
2nd Author's Affiliation Nagoya Institute of Technology
3rd Author's Name Eiji OKAMOTO
3rd Author's Affiliation Nagoya Institute of Technology
Date 2005/2/25
Paper # WBS2004-128,A・P2004-309,RCS2004-396,MoMuC2004-179,MW2004-306
Volume (vol) vol.104
Number (no) 683
Page pp.pp.-
#Pages 5
Date of Issue