Presentation 2005-06-24
A study of Hitless Network Reconfiguration Method in high-speed Packet Processing
Hidenori KAI, Masaru KATAYAMA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) The devices which applied dynamic reconfigurable technology have flexibility and high-performance processing. The flexibility is that circuit configuration data can be changed on the fly. In these features, this technology is applied to the network nodes which realized high-speed packet-processing such as the network terminals and the routers. However, the problem of the adaptation to the network nodes is how to realize the reconfiguration without packet loss. In this paper, we propose some network reconfiguration methods with hitless update function for the packet processing node using the multi-context-type reconfigurable devices.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) reconfiguration / reconfigurable device / hitless update / network reconfiguration / packet processing
Paper # NS2005-48
Date of Issue

Conference Information
Committee NS
Conference Date 2005/6/16(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Network Systems(NS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A study of Hitless Network Reconfiguration Method in high-speed Packet Processing
Sub Title (in English)
Keyword(1) reconfiguration
Keyword(2) reconfigurable device
Keyword(3) hitless update
Keyword(4) network reconfiguration
Keyword(5) packet processing
1st Author's Name Hidenori KAI
1st Author's Affiliation Network Service Systems Laboratories, NTT()
2nd Author's Name Masaru KATAYAMA
2nd Author's Affiliation Network Service Systems Laboratories, NTT
Date 2005-06-24
Paper # NS2005-48
Volume (vol) vol.105
Number (no) 127
Page pp.pp.-
#Pages 4
Date of Issue