Presentation | 2001/3/15 Exact Analysis of Bit Error Probability for Trellis Coded Modulation(2) Hideki YOSHIKAWA, Ikuo OKA, Chikato FUJIWARA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper, we demonstrate an exact analysis of bit probability for treuis coded asym-metric modulation by using the analytical technique which we already proposed. This employs an iterative calculation of probahility density function(pdf)of path metric per a transition, and applicable for multilevel coded modulation. It is shown that error performance results of 4-ary trellis coded modulation employed 2-state convolutional encoders. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | trellis coded modulation / Viterbi decoding / bit error probability / asymmetric modulation |
Paper # | ISEC2000-116 |
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Committee | ISEC |
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Conference Date | 2001/3/15(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Information Security (ISEC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Exact Analysis of Bit Error Probability for Trellis Coded Modulation(2) |
Sub Title (in English) | |
Keyword(1) | trellis coded modulation |
Keyword(2) | Viterbi decoding |
Keyword(3) | bit error probability |
Keyword(4) | asymmetric modulation |
1st Author's Name | Hideki YOSHIKAWA |
1st Author's Affiliation | Suzuka National College of Technology() |
2nd Author's Name | Ikuo OKA |
2nd Author's Affiliation | Faculty of Engineering, Osaka City University |
3rd Author's Name | Chikato FUJIWARA |
3rd Author's Affiliation | Faculty of Engineering, Osaka City University |
Date | 2001/3/15 |
Paper # | ISEC2000-116 |
Volume (vol) | vol.100 |
Number (no) | 691 |
Page | pp.pp.- |
#Pages | 6 |
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