Presentation 1998/7/24
A Self-Reference Read Scheme for a 1T/1C FeRAM
Junichi Yamada, Tohru Miwa, Hiroki Koike, Hideo Toyoshima,
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Abstract(in English) We proposed here a self-reference read scheme for use with 1T/1C FeRAMs. It is able to overcome the reference voltage problem faced by conventional 1T/1C FeRAMs without the use of any reference cells. The proposed scheme employs a memory cell that is accessed twice, and it uses this cell to generate a reference voltage. This self-generated reference voltage is automatically kept between read bit line voltages, which correspond stored data("1"and"0"). We have designed and fabricated a test device, and confirmed the viability of the read scheme.
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Keyword(in English) 1T/1C / FeRAM / ferroelectric / self-reference / reference voltage
Paper # SDM98-107,ICD98-106
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Committee SDM
Conference Date 1998/7/24(1days)
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Registration To Silicon Device and Materials (SDM)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Self-Reference Read Scheme for a 1T/1C FeRAM
Sub Title (in English)
Keyword(1) 1T/1C
Keyword(2) FeRAM
Keyword(3) ferroelectric
Keyword(4) self-reference
Keyword(5) reference voltage
1st Author's Name Junichi Yamada
1st Author's Affiliation Silicon Systems Research Laboratories, NEC Corporation()
2nd Author's Name Tohru Miwa
2nd Author's Affiliation Silicon Systems Research Laboratories, NEC Corporation
3rd Author's Name Hiroki Koike
3rd Author's Affiliation Silicon Systems Research Laboratories, NEC Corporation
4th Author's Name Hideo Toyoshima
4th Author's Affiliation Silicon Systems Research Laboratories, NEC Corporation
Date 1998/7/24
Paper # SDM98-107,ICD98-106
Volume (vol) vol.98
Number (no) 194
Page pp.pp.-
#Pages 6
Date of Issue