| Presentation | 1998/7/24 Integration of Hydrogen Silsesquioxane (HSQ) as an Intermetal Dielectric (IMD) Material for 0.35μm Technology Hee-Sook Park, Hong-Jae Shin, Byung-Jun Kim, Ho-Kyu Kang, Moon-Yong Lee, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The integration issues of the application of HSQ as the non-etch back IMD of logic devices with W via plug were investigated.HSQ based IMD process could reduce the processing time of CMP by 33% compared to O3-TEOS USG based IMD with same global planarity.Degassing process at 550℃ was necessary to obtain the reliable via contact resistance with high temperature storage (HTS) test at 350℃ for 300 hours.Using HSQ in IMD, the parasitic capacitance decreased by 20% compared to that of O3-TEOS USG based IMD.The parasitic capacitance of HSQ was nearly the same as before and after thermal stressing at 350℃ for 300 hours.When HSQ was used as IMD material, the characteristics of transistor and time zero dielectric breakdown voltage(TZDB)exhibited equivalent to those of O3-TEOS USG based IMD.We could successfully integrate the 3-level metallization structure with HSQ in IMD for 0.35μm logic devices. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | HSQ / CMP / parasitic capacitance / via resistance / IMD |
| Paper # | SDM98-97,ICD98-96 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 1998/7/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | KOR |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Integration of Hydrogen Silsesquioxane (HSQ) as an Intermetal Dielectric (IMD) Material for 0.35μm Technology |
| Sub Title (in English) | |
| Keyword(1) | HSQ |
| Keyword(2) | CMP |
| Keyword(3) | parasitic capacitance |
| Keyword(4) | via resistance |
| Keyword(5) | IMD |
| 1st Author's Name | Hee-Sook Park |
| 1st Author's Affiliation | Process Development, Semiconductor R&D Center, Samsung Electronics Co., LTD.() |
| 2nd Author's Name | Hong-Jae Shin |
| 2nd Author's Affiliation | Process Development, Semiconductor R&D Center, Samsung Electronics Co., LTD. |
| 3rd Author's Name | Byung-Jun Kim |
| 3rd Author's Affiliation | Process Development, Semiconductor R&D Center, Samsung Electronics Co., LTD. |
| 4th Author's Name | Ho-Kyu Kang |
| 4th Author's Affiliation | Process Development, Semiconductor R&D Center, Samsung Electronics Co., LTD. |
| 5th Author's Name | Moon-Yong Lee |
| 5th Author's Affiliation | Process Development, Semiconductor R&D Center, Samsung Electronics Co., LTD. |
| Date | 1998/7/24 |
| Paper # | SDM98-97,ICD98-96 |
| Volume (vol) | vol.98 |
| Number (no) | 194 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |