| Presentation | 2001/12/13 Failure analysis technique by extracting the TEM samples from the backside of LSI chips H. Maeda, M. Furuta, M. Hashikawa, Y. Hirose, K. Fukumoto, Y. Mashiko, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | It is powerful technique to inspect the backside of chips when we analyze the structure in the vicinity of the silicon substrate in advanced ULSIs. We tried extracting the Transmission Electron Microscope) TEM samples from the backside using micro-sampling technique or pick-up method to analyze abnomal points observed from the backside in more detail. In results, TEM sample preparation in specific small area in chips can be attained from the backside, which is difficult in using conventional methods.This technique gives cross sectional configurations and element maps of abnormal points in nano-meter order. Therefore we can get to investigate the causes of the failures more exactly. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Transmission Electron Microscope / backside analysis / micro-sampling / pick-up method / multi-layer interconnects |
| Paper # | CPM-118,ICD-170 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2001/12/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Failure analysis technique by extracting the TEM samples from the backside of LSI chips |
| Sub Title (in English) | |
| Keyword(1) | Transmission Electron Microscope |
| Keyword(2) | backside analysis |
| Keyword(3) | micro-sampling |
| Keyword(4) | pick-up method |
| Keyword(5) | multi-layer interconnects |
| 1st Author's Name | H. Maeda |
| 1st Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corporation() |
| 2nd Author's Name | M. Furuta |
| 2nd Author's Affiliation | Ryouden Semiconductor System Engineering Corporation |
| 3rd Author's Name | M. Hashikawa |
| 3rd Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corporation |
| 4th Author's Name | Y. Hirose |
| 4th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corporation |
| 5th Author's Name | K. Fukumoto |
| 5th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corporation |
| 6th Author's Name | Y. Mashiko |
| 6th Author's Affiliation | ULSI Development Center, Mitsubishi Electric Corporation |
| Date | 2001/12/13 |
| Paper # | CPM-118,ICD-170 |
| Volume (vol) | vol.101 |
| Number (no) | 518 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |