Presentation 2001/8/17
High-Performance Stereo Vision VLSI Processor and Its Applications
Masanori Hariyama, Toshiki Takeuchi, Michitaka Kameyama,
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Abstract(in English) Stereo vision is a well-known method of three-dimensional instrumentation. A major issue of stereo vision is to establish reliable correspondence between images. This article presents a reliable stereo-matching algorithm based on SAD(Sum of Absolute Differences)computation. Reliable corresponding points can be found by selecting a desirable window size of the SAD computation based on the uniqueness of a minimum value of the SAD graph. A pixel-serial window-parallel scheduling is also proposed to achieve 100% utilization of processing elements. The stereo vision VLSI processor is fabricated in a gate-array-based approach. Its performance is more than 400 times higher than that of a general-purpose processor.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SAD(Sum of Absolute Differences) / optimal window size / special-purpose processor / ASIC
Paper # ICD2001-70
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Committee ICD
Conference Date 2001/8/17(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) High-Performance Stereo Vision VLSI Processor and Its Applications
Sub Title (in English)
Keyword(1) SAD(Sum of Absolute Differences)
Keyword(2) optimal window size
Keyword(3) special-purpose processor
Keyword(4) ASIC
1st Author's Name Masanori Hariyama
1st Author's Affiliation Graduate School of Information Sciences, Tohoku University()
2nd Author's Name Toshiki Takeuchi
2nd Author's Affiliation Graduate School of Information Sciences, Tohoku University
3rd Author's Name Michitaka Kameyama
3rd Author's Affiliation Graduate School of Information Sciences, Tohoku University
Date 2001/8/17
Paper # ICD2001-70
Volume (vol) vol.101
Number (no) 266
Page pp.pp.-
#Pages 6
Date of Issue