Presentation 2002/9/24
Investigation of Equivalent Circuit Model of ESD Protection Devices
Hiromi ANZAI, Yosiharu TOSAKA, Kunihiro SUZUKI, Hideki OKA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) It is difficult to keep ESD (ElectroStatic Discharge) immunity of protection devices. We study ESD immunity using circuit simulations. We investigate an equivalent circuit model of ESD protection devices, which represents the gate vias dependence of the snapback characteristics.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) ESD / Circuit Simulation / Protection Circuit / Protection Device / Snapback Characteristic / Equivalent Circuit Model
Paper # VLD2002-77
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Conference Information
Committee VLD
Conference Date 2002/9/24(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Investigation of Equivalent Circuit Model of ESD Protection Devices
Sub Title (in English)
Keyword(1) ESD
Keyword(2) Circuit Simulation
Keyword(3) Protection Circuit
Keyword(4) Protection Device
Keyword(5) Snapback Characteristic
Keyword(6) Equivalent Circuit Model
1st Author's Name Hiromi ANZAI
1st Author's Affiliation Fujitsu Laboratories Ltd.()
2nd Author's Name Yosiharu TOSAKA
2nd Author's Affiliation Fujitsu Laboratories Ltd.
3rd Author's Name Kunihiro SUZUKI
3rd Author's Affiliation Fujitsu Laboratories Ltd.
4th Author's Name Hideki OKA
4th Author's Affiliation Fujitsu Laboratories Ltd.
Date 2002/9/24
Paper # VLD2002-77
Volume (vol) vol.102
Number (no) 345
Page pp.pp.-
#Pages 5
Date of Issue