| Presentation | 2002/9/24 Parallel Circuit Simulation on A General Purpose PC cluster Kimihiko KUWADA, Koutaro HACHIYA, Toshiyuki SAITOH, Toshiyuki NAKATA, Kosuke TATSUKAWA, Naoki SUGITANI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | According to VLSI trend of faster clock rate and miniaturization, the needs for simulating larger circuits are increasing during the circuit design phase. Needs for full-chip clock analysis and dynamic power supply noise analysis are such examples. In this paper, we propose circuit simulation system using general-purpose PC cluster for large-scale simulation with high accuracy and high execution speed. Our experimental results show that the system offers 10 times faster simulation speed with 16 processors compared to the case with a single processor. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | circuit simulation / PC cluster / circuit partitioning / multithread |
| Paper # | VLD2002-74 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2002/9/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Parallel Circuit Simulation on A General Purpose PC cluster |
| Sub Title (in English) | |
| Keyword(1) | circuit simulation |
| Keyword(2) | PC cluster |
| Keyword(3) | circuit partitioning |
| Keyword(4) | multithread |
| 1st Author's Name | Kimihiko KUWADA |
| 1st Author's Affiliation | NEC Electron device System LSI Operation Unit() |
| 2nd Author's Name | Koutaro HACHIYA |
| 2nd Author's Affiliation | NEC Electron device System LSI Operation Unit |
| 3rd Author's Name | Toshiyuki SAITOH |
| 3rd Author's Affiliation | NEC Electron device System LSI Operation Unit |
| 4th Author's Name | Toshiyuki NAKATA |
| 4th Author's Affiliation | NEC Internet Systems Research Laboratories |
| 5th Author's Name | Kosuke TATSUKAWA |
| 5th Author's Affiliation | NEC Internet Systems Research Laboratories |
| 6th Author's Name | Naoki SUGITANI |
| 6th Author's Affiliation | NEC Infomatec Systems |
| Date | 2002/9/24 |
| Paper # | VLD2002-74 |
| Volume (vol) | vol.102 |
| Number (no) | 345 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |