Presentation	2002/9/23 Optimization of Lateral Diffusion of Source and Drain for Sub-100-nm Channel Silicon-on-insulator MOSFETs Akihiro KAWAMOTO, Shingo SATO, Yasuhisa OMURA,
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Abstract(in English)	This paper investigates how the lateral diffusion extent (L_ld) of source and drain regions influences device characteristics of short-channel SOI MOSFETs. Since L_ld-scaling involves a trade-off between the maximal carrier velocity (V_max) and the threshold voltage (V_th), the optimization of L_ld is indispensable. However, even after L_ld is optimized in some way, it is found that the net performance advancement offered by device-scaling is quite limited. It follows that in designing sub-100 nm SOI devices, high-k material and new doping materials, such as Sb or In, should be introduced.
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Paper #	VLD2002-65
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Committee	VLD
Conference Date	2002/9/23(1days)
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Registration To	VLSI Design Technologies (VLD)
Language	JPN
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Title (in English)	Optimization of Lateral Diffusion of Source and Drain for Sub-100-nm Channel Silicon-on-insulator MOSFETs
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1st Author's Name	Akihiro KAWAMOTO
1st Author's Affiliation	Faculty of Engineering, Kansai University()
2nd Author's Name	Shingo SATO
2nd Author's Affiliation	Faculty of Engineering, Kansai University
3rd Author's Name	Yasuhisa OMURA
3rd Author's Affiliation	Faculty of Engineering, Kansai University:High-Technology Research Center
Date	2002/9/23
Paper #	VLD2002-65
Volume (vol)	vol.102
Number (no)	344
Page	pp.pp.-
#Pages	6
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