| Presentation | 2001/11/23 Design of driver circuit for GHz clock distribution using transmission line interconnect in Si ULSI Tomohito TSUSHIMA, Yoshisato YOKOYAMA, Hou Wan Felix CHAN, Kazuya MASU, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents the circuit configuration and analysis of GHz clock distribution using the transmission line, First, we report the operation of the differential CMOS driver circuit with source follower and the decrease of power dissipation for H-tree GHz clock distribution with the source follower using SPICE simulation. Next, power -time product |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Clock distribution / Transmission line / distributed constant circuit |
| Paper # | VLD2001-116,ICD2001-161,FTS2001-63 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2001/11/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of driver circuit for GHz clock distribution using transmission line interconnect in Si ULSI |
| Sub Title (in English) | |
| Keyword(1) | Clock distribution |
| Keyword(2) | Transmission line |
| Keyword(3) | distributed constant circuit |
| 1st Author's Name | Tomohito TSUSHIMA |
| 1st Author's Affiliation | Precision and Intelligence Laboratory, Tokyo Institute of Technology() |
| 2nd Author's Name | Yoshisato YOKOYAMA |
| 2nd Author's Affiliation | Precision and Intelligence Laboratory, Tokyo Institute of Technology |
| 3rd Author's Name | Hou Wan Felix CHAN |
| 3rd Author's Affiliation | Precision and Intelligence Laboratory, Tokyo Institute of Technology |
| 4th Author's Name | Kazuya MASU |
| 4th Author's Affiliation | Precision and Intelligence Laboratory, Tokyo Institute of Technology |
| Date | 2001/11/23 |
| Paper # | VLD2001-116,ICD2001-161,FTS2001-63 |
| Volume (vol) | vol.101 |
| Number (no) | 468 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |