| Presentation | 2001/5/11 Comparison among various synthesis methods on semi-synchronous framework Tetsuaki Utsumi, Seiichiro Ishijima, Atsushi Takahashi, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The clock period of a synchronous circuit can become shorter if the clock input timing is properly scheduled, such a circuit is called a semi-synchronous circuit. In this paper, we synthesized a MIPS compatible microprocessor in several ways, such as only applying a semi-synchronous optimization, applying a semi-synchronous optimization after applying complete-synchronous optimization, and so on. Then we make a comparison among circuits obtaind by those methods, and give considerations of semi-synchronous synthesis. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | semi-syncronous design / logic circuit / processor / delay |
| Paper # | VLD2001-11 |
| Date of Issue |
| Conference Information | |
| Committee | VLD |
|---|---|
| Conference Date | 2001/5/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Comparison among various synthesis methods on semi-synchronous framework |
| Sub Title (in English) | |
| Keyword(1) | semi-syncronous design |
| Keyword(2) | logic circuit |
| Keyword(3) | processor |
| Keyword(4) | delay |
| 1st Author's Name | Tetsuaki Utsumi |
| 1st Author's Affiliation | Department of Communications and Intagrated Systems, Tokyo Institute of Technology() |
| 2nd Author's Name | Seiichiro Ishijima |
| 2nd Author's Affiliation | Department of Communications and Intagrated Systems, Tokyo Institute of Technology |
| 3rd Author's Name | Atsushi Takahashi |
| 3rd Author's Affiliation | Department of Communications and Intagrated Systems, Tokyo Institute of Technology |
| Date | 2001/5/11 |
| Paper # | VLD2001-11 |
| Volume (vol) | vol.101 |
| Number (no) | 46 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |