| Presentation | 2001/1/5 On a Technique to Eliminate False-Paths for the Statistical Static Timing Analysis Shunji TSUKIYAMA, Masakazu TANAKA, Masahiro FUKUI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we present a tequnique to eliminate false-paths sepcified by the circuit topology in the statistical static timing analysis of a CMOS combinatorial circuit. The technique can be embeded in our timing analyzer, which treats not only correlations between distributions of delays of reconvergent-paths, but also correlations between distributions of transistor delays in a logic gate and correlations between interconnect delays in a net. The method treating such correlations is used for eliminating falth-paths. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | static timing analysis / statistical approach / false-path / correlation / CMOS combinatorial circuit |
| Paper # | VLD2000-121,CPSY2000-76 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2001/1/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | On a Technique to Eliminate False-Paths for the Statistical Static Timing Analysis |
| Sub Title (in English) | |
| Keyword(1) | static timing analysis |
| Keyword(2) | statistical approach |
| Keyword(3) | false-path |
| Keyword(4) | correlation |
| Keyword(5) | CMOS combinatorial circuit |
| 1st Author's Name | Shunji TSUKIYAMA |
| 1st Author's Affiliation | Dept.of EECE Chuo University() |
| 2nd Author's Name | Masakazu TANAKA |
| 2nd Author's Affiliation | Advanced LSI Technology Development Center Matsushita Electric Industrial CO., Ltd. |
| 3rd Author's Name | Masahiro FUKUI |
| 3rd Author's Affiliation | Advanced LSI Technology Development Center Matsushita Electric Industrial CO., Ltd. |
| Date | 2001/1/5 |
| Paper # | VLD2000-121,CPSY2000-76 |
| Volume (vol) | vol.100 |
| Number (no) | 532 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |