Presentation | 2001/1/5 A Resource Binding Algorithm Based on Computation Time Estimation Using Heuristic Method and Branch-and-bound Method Hiroshi NAKAMURA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper proposes a resource binding algorithm based on computation time estimation in the high-level synthesis system for digital signal processing. In the algorithm, a heuristic based binder is first executed and then a branch-and-bound based binder is executed. The computation time to run the algorithm depends on the number of resource assignments which the heuristic based binder determines. Thus we can estimate computation time to run the algorithm by varying the number of such resource assignments. In the algorithm, for a given constraint of computation time, we first obtain the number of resource assignments which the heuristic based binder determines based on the computation time estimation. Then we actually execute the heuristic based binder. After that, we execute the branch-and-bound based binder for the rest of the resource assignments. Experimental results demonstrate effectiveness and efficiency of the algorithm. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | resource binding / high-level synthesis / computation time / digital signal processing |
Paper # | VLD2000-119,CPSY2000-74 |
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Committee | VLD |
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Conference Date | 2001/1/5(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Resource Binding Algorithm Based on Computation Time Estimation Using Heuristic Method and Branch-and-bound Method |
Sub Title (in English) | |
Keyword(1) | resource binding |
Keyword(2) | high-level synthesis |
Keyword(3) | computation time |
Keyword(4) | digital signal processing |
1st Author's Name | Hiroshi NAKAMURA |
1st Author's Affiliation | Dept.of Electronics, Information and Communication Engineering, Waseda University() |
2nd Author's Name | Nozomu TOGAWA |
2nd Author's Affiliation | Advanced Research Center for Science and Engineering, Waseda University |
3rd Author's Name | Masao YANAGISAWA |
3rd Author's Affiliation | Dept.of Electronics, Information and Communication Engineering, Waseda University |
4th Author's Name | Tatsuo OHTSUKI |
4th Author's Affiliation | Dept.of Electronics, Information and Communication Engineering, Waseda University |
Date | 2001/1/5 |
Paper # | VLD2000-119,CPSY2000-74 |
Volume (vol) | vol.100 |
Number (no) | 532 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |