Presentation 2000/11/23
A Self-reproducing Circuit on a Dynamically Reconfigurable Asynchronous LSI
Ryusuke KONISHI, Hideyuki ITO, Hiroshi NAKADA, Tsunemichi SHIOZAWA, Minoru INAMORI, Akira NAGOYA,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, we report on a self-reproducing circuit configured on PCA-1, which is the first VLSI chip realizing the Plastic Cell Architecture(PCA). PCA is a hardware architecture that enables dynamic and autonomous reconfiguration of logic circuits. From a structural point of view, PCA is a dual layered cell array, which cell is composed of a plastic part and a built-in part. We designed PCA-1 as a fully asynchronous LSI. Thus, the circuits on the plastic part are configured as self-timed circuits. The self-reproduction is performed as a cooperative task of built-in parts and a circuit on the plastic part. We confirmed that the on-chip self-reproducing circuit behaved correctly as simulated.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) reconfigurable computing / dynamic reconfiguration / asynchronous circuits / VLSI / FPGA
Paper # VLD2000-79,ICD2000-136,FTS2000-44
Date of Issue

Conference Information
Committee VLD
Conference Date 2000/11/23(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Self-reproducing Circuit on a Dynamically Reconfigurable Asynchronous LSI
Sub Title (in English)
Keyword(1) reconfigurable computing
Keyword(2) dynamic reconfiguration
Keyword(3) asynchronous circuits
Keyword(4) VLSI
Keyword(5) FPGA
1st Author's Name Ryusuke KONISHI
1st Author's Affiliation NTT Network Innovation Laboratories()
2nd Author's Name Hideyuki ITO
2nd Author's Affiliation NTT Network Innovation Laboratories
3rd Author's Name Hiroshi NAKADA
3rd Author's Affiliation NTT Network Innovation Laboratories
4th Author's Name Tsunemichi SHIOZAWA
4th Author's Affiliation NTT Network Innovation Laboratories
5th Author's Name Minoru INAMORI
5th Author's Affiliation NTT Network Innovation Laboratories
6th Author's Name Akira NAGOYA
6th Author's Affiliation NTT Network Innovation Laboratories
Date 2000/11/23
Paper # VLD2000-79,ICD2000-136,FTS2000-44
Volume (vol) vol.100
Number (no) 473
Page pp.pp.-
#Pages 6
Date of Issue