Presentation | 2000/6/15 An Efficient FDTD Method Using the Network Partitioning Technique and Synthesis of Interconnect Macromodel Hirofumi MIYASHITA, Takayuki WATANABE, Hideki ASAI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | This paper describes a novel method to simulate transient responses of interconnects. First, the impulse responses between any pair of terminals of lines are obtained by the finite-difference time-domain(FDTD)method, where the network partitioning technique is exploited for CPU time reduction. Next, Y-parameter of the network is composed from the Y-parameters of partitioning subnetworks. Then, the macromodels are synthesized from the frequency responses. Finally, with this model, the transient responses are rapidly simulated by the conventional circuit simulators. In conclusion the validity of this method is verified by comparison with the time-consuming FDTD simulation. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | transmission lines / finite-difference time-domain method / network partitioning technique / interconnect macro-modeling |
Paper # | CAS2000-18,VLD2000-27,DSP2000-39 |
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Conference Information | |
Committee | VLD |
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Conference Date | 2000/6/15(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | An Efficient FDTD Method Using the Network Partitioning Technique and Synthesis of Interconnect Macromodel |
Sub Title (in English) | |
Keyword(1) | transmission lines |
Keyword(2) | finite-difference time-domain method |
Keyword(3) | network partitioning technique |
Keyword(4) | interconnect macro-modeling |
1st Author's Name | Hirofumi MIYASHITA |
1st Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University() |
2nd Author's Name | Takayuki WATANABE |
2nd Author's Affiliation | School of Administration and Informatics University of Shizuoka |
3rd Author's Name | Hideki ASAI |
3rd Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University |
Date | 2000/6/15 |
Paper # | CAS2000-18,VLD2000-27,DSP2000-39 |
Volume (vol) | vol.100 |
Number (no) | 120 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |