Presentation	2000/5/5 On Enumerating Non-Disjunctive Decompositions of Logic Functions Yusuke Matsunaga,
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Abstract(in English)	This paper describes an efficient algorithm enumerating all the non-disjunctive decomposition of a given function. The algorithm utilized the disjunctive decomposition algorithm using binary decision diagrams that the authors have previously developed. Since, in general, there exist too many non-disjunctive decompositions for ordinary logic functions, the algorithm restricts to enumerate only decompositions whose duplicated variables are less than the given limit. Comparing to the existing naive algorithm, about 5 or 6 times acceleration has been observed for a case of applying to 7-inputs functions.
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Keyword(in English)	logic synthesis / functional decomposition / binary decision diagrams
Paper #	VLD2000-9
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Committee	VLD
Conference Date	2000/5/5(1days)
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Paper Information
Registration To	VLSI Design Technologies (VLD)
Language	JPN
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Title (in English)	On Enumerating Non-Disjunctive Decompositions of Logic Functions
Sub Title (in English)
Keyword(1)	logic synthesis
Keyword(2)	functional decomposition
Keyword(3)	binary decision diagrams
1st Author's Name	Yusuke Matsunaga
1st Author's Affiliation	Fujitsu Laboratories LTD.()
Date	2000/5/5
Paper #	VLD2000-9
Volume (vol)	vol.100
Number (no)	36
Page	pp.pp.-
#Pages	7
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