| Presentation | 2000/5/4 Low Power Consumption CMOS Digital Matched Filter : An Application Example of the Plastic Hard Macro^ Kazuo TAKI, Kiyoshi KITAMURA, Yutaka MURATA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A low power consumption Digital Matched Filter(DMF) was designed in 1.8V operation 0.18μm CMOS technology. An 8-bit input 256-tap DMF showed 0, 38mW/MHz low power characteristics, that just fitted a portable phone use. Special features are the PN code shifting architecture, an application of the Plastic Hard Macro^ |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Digital matched filter / DMF / Low power consumption / Plastic Hard Macro / High layout density |
| Paper # | VLD2000-1 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2000/5/4(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low Power Consumption CMOS Digital Matched Filter : An Application Example of the Plastic Hard Macro^ |
| Sub Title (in English) | |
| Keyword(1) | Digital matched filter |
| Keyword(2) | DMF |
| Keyword(3) | Low power consumption |
| Keyword(4) | Plastic Hard Macro |
| Keyword(5) | High layout density |
| 1st Author's Name | Kazuo TAKI |
| 1st Author's Affiliation | Department of Computer and Systems Engineering, Kobe University() |
| 2nd Author's Name | Kiyoshi KITAMURA |
| 2nd Author's Affiliation | AIL Co.Ltd. |
| 3rd Author's Name | Yutaka MURATA |
| 3rd Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| Date | 2000/5/4 |
| Paper # | VLD2000-1 |
| Volume (vol) | vol.100 |
| Number (no) | 35 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |