Presentation | 2000/3/3 Substrate-Biased Domino CMOS Circuit Design I: Circuit Simulation by BSIM3v3 Model Yoshinibu Sakai, Toshiro Akino, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | By using new substrate-bias power lines [V_ |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | substrate-bias / threshold voltage / domino CMOS circuit / BSIM3v3 model |
Paper # | VLD99-126,ICD99-283 |
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Conference Information | |
Committee | VLD |
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Conference Date | 2000/3/3(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Chair | |
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Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Substrate-Biased Domino CMOS Circuit Design I: Circuit Simulation by BSIM3v3 Model |
Sub Title (in English) | |
Keyword(1) | substrate-bias |
Keyword(2) | threshold voltage |
Keyword(3) | domino CMOS circuit |
Keyword(4) | BSIM3v3 model |
1st Author's Name | Yoshinibu Sakai |
1st Author's Affiliation | Department of Electronic System and Information Engineering School of Biology-Oriented Science and Technology, Kinki University() |
2nd Author's Name | Toshiro Akino |
2nd Author's Affiliation | Department of Electronic System and Information Engineering School of Biology-Oriented Science and Technology, Kinki University |
Date | 2000/3/3 |
Paper # | VLD99-126,ICD99-283 |
Volume (vol) | vol.99 |
Number (no) | 659 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |