| Presentation | 2000/3/2 A Design Environment for a Vector-pipeline Processor Kazutoshi Kobayashi, Makoto Eguchi, Takuya Iwahashi, Takehide Shibayama, Sho Li, Hidetoshi Onodera, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We introduce a design and verfication method for a vector-pipeline DSP(VP-DSP) and describe a image compression system using VP-DSP briefly. A assembler-emulator is developed with Perl script language to verify the behavior of the DSP. Register values and contents of memory are dumped to ASCII files from both of the emulator and the simulator. They are compared to detect mismatches. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DSP / FPGA / HDL / System Verification / Vector Quantization / Image Compression |
| Paper # | VLD99-111,ICD99-268 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2000/3/2(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Design Environment for a Vector-pipeline Processor |
| Sub Title (in English) | |
| Keyword(1) | DSP |
| Keyword(2) | FPGA |
| Keyword(3) | HDL |
| Keyword(4) | System Verification |
| Keyword(5) | Vector Quantization |
| Keyword(6) | Image Compression |
| 1st Author's Name | Kazutoshi Kobayashi |
| 1st Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University() |
| 2nd Author's Name | Makoto Eguchi |
| 2nd Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University |
| 3rd Author's Name | Takuya Iwahashi |
| 3rd Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University |
| 4th Author's Name | Takehide Shibayama |
| 4th Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University |
| 5th Author's Name | Sho Li |
| 5th Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University |
| 6th Author's Name | Hidetoshi Onodera |
| 6th Author's Affiliation | Department of Communications and Computor Engineering, Kyoto University |
| Date | 2000/3/2 |
| Paper # | VLD99-111,ICD99-268 |
| Volume (vol) | vol.99 |
| Number (no) | 658 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |