Presentation 2000/3/2
A Dynamically Reconfigurable System Based on FPGAs and Its Application to a Data Encryption Algorithm
Takashi HAKIRI, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Recently, there has been proposed a dynamically reconfigurable system where a part of the system can be reconfigured in-system. Dynamically reconfigurable systems achieve both hardware effciency and software programmability.This paper proposes a dynamically reconfigurable system for fast digital signal processing. The system consists of one control unit and one or more operation units. The control unit controls data transfer between a host computer and the system. And it also controls entire operation units. Each oparation unit contains an SRAM-based FPGA and can be dynamically reconfigured in-system. Therefore the system can implement a large application program exceeding the size of physical hardware resources of the system. A DES algorithm has been implemented on the system and experimental results show that the system executes the DES algorithm 25 times faster than a software process on a workstation.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / reconfigurable system / dynamic reconfiguration / digital signal processing / data encryption
Paper # VLD99-109,ICD99-266
Date of Issue

Conference Information
Committee VLD
Conference Date 2000/3/2(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Dynamically Reconfigurable System Based on FPGAs and Its Application to a Data Encryption Algorithm
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) reconfigurable system
Keyword(3) dynamic reconfiguration
Keyword(4) digital signal processing
Keyword(5) data encryption
1st Author's Name Takashi HAKIRI
1st Author's Affiliation Dept. of Electronics, Information and Communication Engineering Waseda University()
2nd Author's Name Nozomu TOGAWA
2nd Author's Affiliation >Dept. of Electronics, Information and Communication Engineering Waseda University
3rd Author's Name Masao YANAGISAWA
3rd Author's Affiliation >Dept. of Electronics, Information and Communication Engineering Waseda University
4th Author's Name Tatsuo OHTSUKI
4th Author's Affiliation >Dept. of Electronics, Information and Communication Engineering Waseda University
Date 2000/3/2
Paper # VLD99-109,ICD99-266
Volume (vol) vol.99
Number (no) 658
Page pp.pp.-
#Pages 8
Date of Issue