| Presentation | 1999/6/11 Clock Scheduling with Consideration of Modification Cost in Semi-Synchrornous Circuit Tomoyuki Yoda, Tetsuo Sasaki, Atsushi Takahashi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The clock period of a synchronous circuit can become shorter if the clock input timing is properly scheduled, such a circuit is called a semi-synchronous circuit. The cost of a clock tree to relize a clock schedule or the cost of a circuit modification to make the circuit workirng under the cloock schedule depends on the clock schedule itself. In this paper, we propose clock scheduling algorithms to minimize tlae cost of a clock tree and the cost, of a circuit modification subject to the performance of the semi-synchronous circuit. By applying these algorithms, we can get a better clock schedule. The methods that handle the multi-phases clock and the range of a clock timing in the semi-synchronous circuit are discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Semi-Syrnchronous / Clock Scheduling / delay |
| Paper # | VLD99-36 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1999/6/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Clock Scheduling with Consideration of Modification Cost in Semi-Synchrornous Circuit |
| Sub Title (in English) | |
| Keyword(1) | Semi-Syrnchronous |
| Keyword(2) | Clock Scheduling |
| Keyword(3) | delay |
| 1st Author's Name | Tomoyuki Yoda |
| 1st Author's Affiliation | Dept. of Electrical and Electronic Engrg., Tokyo Inst. of Tech.() |
| 2nd Author's Name | Tetsuo Sasaki |
| 2nd Author's Affiliation | Enterprise Server Division, Hitachi Ltd. |
| 3rd Author's Name | Atsushi Takahashi |
| 3rd Author's Affiliation | Dept. of Electrical and Electronic Engrg., Tokyo Inst. of Tech. |
| Date | 1999/6/11 |
| Paper # | VLD99-36 |
| Volume (vol) | vol.99 |
| Number (no) | 108 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |