| Presentation | 1998/9/22 Low Power Consumption LSI Design with Soft Core IP : An Application of Power-Conscious CMOS Cell Library Kiyohide HORI, Yutaka MURATA, Kazuo TAKI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A low power consumption LSI design has been tried based on the 8051 soft core IP, coupled with a newly developed low power consumption CMOS cell library. The special features of the CMOS cell library are super low power consumption, small cell area, small load delay, and synthesizebility with an ordinary synthesis tool. The 8051 microcontroller is designed with the CMOS cell library under operating conditions of 40MHz, 67MHz and 100MHz. After the layout design, the chip area and power consumption (simulated on a power simulator) are compared with those of conventional CMOS designs. Very good results of 32.8-29.8% power reduction with 7.3-0% chip area reduction have been achieved. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Low-Power / IP / 8051 / CMOS standard cell |
| Paper # | VLD98-53,ICD98-156,FTS98-80 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1998/9/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low Power Consumption LSI Design with Soft Core IP : An Application of Power-Conscious CMOS Cell Library |
| Sub Title (in English) | |
| Keyword(1) | Low-Power |
| Keyword(2) | IP |
| Keyword(3) | 8051 |
| Keyword(4) | CMOS standard cell |
| 1st Author's Name | Kiyohide HORI |
| 1st Author's Affiliation | Graduate School of Science and Technology, Kobe University() |
| 2nd Author's Name | Yutaka MURATA |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Kobe University |
| 3rd Author's Name | Kazuo TAKI |
| 3rd Author's Affiliation | Department of Computer and Systems Engineering, Kobe University |
| Date | 1998/9/22 |
| Paper # | VLD98-53,ICD98-156,FTS98-80 |
| Volume (vol) | vol.98 |
| Number (no) | 287 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |